DC Field | Value | Language |
dc.contributor.author | Belous, A. I. | - |
dc.contributor.author | Solodukha, V. | - |
dc.contributor.author | Shvedov, S. | - |
dc.contributor.author | Borovik, A. M. | - |
dc.contributor.author | Kostrov, A. I. | - |
dc.contributor.author | Stempitsky, V. R. | - |
dc.date.accessioned | 2018-01-09T12:21:33Z | - |
dc.date.available | 2018-01-09T12:21:33Z | - |
dc.date.issued | 2017 | - |
dc.identifier.citation | Parallel computing environment for digital devices simulation and VLSI topology verification / A. Belousand others // Nano-design, technology, computer simulations : proceedings of 17th International workshop on new approaches to high –tech (26-27 October, 2017). – Minsk : BSUIR, 2017. – С. 155 - 158. | ru_RU |
dc.identifier.uri | https://libeldoc.bsuir.by/handle/123456789/29056 | - |
dc.language.iso | en | ru_RU |
dc.publisher | БГУИР | ru_RU |
dc.subject | материалы конференций | ru_RU |
dc.subject | parallel computing environment | ru_RU |
dc.subject | digital devices simulation | ru_RU |
dc.subject | VLSI topology verification | ru_RU |
dc.title | Parallel computing environment for digital devices simulation and VLSI topology verification | ru_RU |
dc.type | Статья | ru_RU |
Appears in Collections: | NDTCS 2017
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