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Please use this identifier to cite or link to this item: https://libeldoc.bsuir.by/handle/123456789/42162
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dc.contributor.authorGorodecky, D.-
dc.contributor.authorBibilo, P.-
dc.date.accessioned2020-12-28T06:53:30Z-
dc.date.available2020-12-28T06:53:30Z-
dc.date.issued2020-
dc.identifier.citationGorodecky, D. Constant Multiplication Based on Boolean Minimization / D. Gorodecky, P. Bibilo // Boolean Problems: proceedings of the 14th International workshop, Bremen, September, 24–25, 2020 / University of Bremen. – Bremen, 2020. – 15 p.ru_RU
dc.identifier.urihttps://libeldoc.bsuir.by/handle/123456789/42162-
dc.description.abstractThis contribution studies constant multiplication X ·C and X · C (mod P), where constant C achieves 2263 bits and variable X varies up to 10 bits. We aim to develop an efficient approach to design constant multiplication for FPGA and ASIC. The proposed technique demonstrates up to 2 times advantage in performance and up to 5 times advantage in area costs under direct multiplication on FPGA, up to 7 times in performance in custom library on ASIC.ru_RU
dc.language.isoenru_RU
dc.publisherUniversity of Bremenru_RU
dc.subjectпубликации ученыхru_RU
dc.subjectconstant multiplicationru_RU
dc.subjectboolean minimizationru_RU
dc.titleConstant Multiplication Based on Boolean Minimizationru_RU
dc.typeСтатьяru_RU
Appears in Collections:Публикации в зарубежных изданиях

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