Universal Address Sequence Generator for Memory Built-in Self-test

Abstract

This paper presents the universal ad-dress sequence generator (UASG) for memorybuilt-in-self-test. The studies are based on the proposed universal method for generating address se-quences with the desired properties for multirun march memory tests. As a mathematical model, a modification of the recursive relation for quasi-random sequence generation is used. For this model, a structural diagram of the hardware implementation is given, of which the basis is a storage device for storing so-called direction numbers of the generation matrix. The form of the generation matrix determines the basic properties of the generated ad-dress sequences. The proposed UASG generates a wide spectrum of different address sequences, including the stand-ard ones, such as linear, address com-plement, gray code, worst-case gate delay, 2i, next address, and pseudoran-dom. Examples of the use of the pro-posed methods are considered. The result of the practical implementation of the UASG is presented, and the main characteristics are evaluated.