Skip navigation
Please use this identifier to cite or link to this item: https://libeldoc.bsuir.by/handle/123456789/7592
Title: A study on linear regression of cpi and miss ratios in hierarchy memory of nehalem systems
Authors: Askari, M.
Аскари, М.
Keywords: материалы конференций
Issue Date: 2013
Publisher: БГУИР
Citation: Askari, M. A study on linear regression of cpi and miss ratios in hierarchy memory of nehalem systems / М. Askari // Компьютерные системы и сети : материалы 49-й научной конференции аспирантов, магистрантов и студентов, Минск, 6–10 мая 2013 г. / Белорусский государственный университет информатики и радиоэлектроники ; редкол.: В. А. Прытков [и др.]. – Минск, 2013. – С. 36–37.
Abstract: Recently, with growing the gap between processors and memory speeds, parallel performance on chip multithread processors becomes more attractive for filling up this gap. It occurs the multithread scheduling on chip multithread processors to improve the performance. In this direction, calculating the Cycle per Instructions (CPI) and its relationship with miss ratios in hierarchy memory is important. To finding the correlation between CPI and miss ratios and footprints, it’s required to show linear relation between them at first. In this paper, linear regression between CPI and miss ratios has discussed in hierarchy memory including Translation Look-aside Buffer (TLB), first level of cache (L1), L2 and L3 on a Nehalem system. Intel-Vtune 2013 and SPEC-CPU 2000 benchmarks are used to measure the CPI and cache miss ratios.
URI: https://libeldoc.bsuir.by/handle/123456789/7592
Appears in Collections:Компьютерные системы и сети : материалы 49-й научной конференции аспирантов, магистрантов и студентов (2013)

Files in This Item:
File Description SizeFormat 
Askari_A.PDF355.32 kBAdobe PDFView/Open
Show full item record Google Scholar

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.